A primary function of a wireless receiver is to down-convert the received wanted radio frequency signal to a baseband and/or digital form in order to process the wanted signal. In order to selectively extract the wanted signal from noise or other undesired signals, filters are used. Filters are employed at various stages of a receiver's architecture, from analog radio frequency (RF) filters through to digital filters. A digital filter operates on a discrete time sample set, where the value of the samples has been rounded to the nearest value from a finite set of possible values, typically represented as a binary number.
An analog discrete time filter (DTF) operates on a discrete time sample set, where the value of the samples is continuous (typically a real number), and where digitization occurs in an analog-to-digital converter (ADC) located after this filter. DTFs have two forms, i.e. Finite Impulse Response (FIR) and Infinite Impulse Response (IIR). In receivers having FIR DTFs, it is known that sampling capacitances need to be accurately matched.
Referring now to FIG. 1, a known example of a receiver 100 with a baseband decimate-by-2 (or higher order decimating) FIR discrete time filter 120 is illustrated. The receiver 100 includes a source voltage 110 coupled via a source resistance 112 to an input port 114, which represents an input radio frequency signal. The equivalent input radio frequency signal is input to a low-noise amplifier (LNA) 116. The output from the low-noise amplifier 116 is input to a quadrature down-mixers 106, 108 that down-converts the (equivalent) input radio frequency signal to a baseband signal in response to quadrature local oscillator (LO) signals being applied to the quadrature down-mixer 106, 108.
The quadrature baseband outputs from the quadrature down-mixers 106, 108 are input to a baseband filter network, which is illustrated in a form of an N-branch parallel discrete time filter 120.
A full filter is made of N-branches, but each branch does not form a full filter by itself, just a sampling capacitor Cs or, in general, a set of sampling capacitors Cs. The N-branch parallel discrete time filter includes source capacitors Cs 126 in each branch. Control of the N branches of FIR DTFs is typically implemented by means of transistor switches with small conducting resistances RON. In this manner, sampling capacitors Cs 126 in each branch are selectively coupled to the input by a set of respective switches (ϕ0, ϕ1, ϕ2) 122. The sampling capacitors Cs 126 in each branch are selectively coupled to the output by a further set of respective switches (α0, α1, α2) 128. The sampling capacitors Cs 126 in each branch are selectively reset by a further set of respective switches (θ0, θ1, θ2) 124. The outputs from the N-branches are then combined (summed) and coupled to an output capacitor (Cout) 120 to provide an output voltage Vout from the decimate-by-2 FIR discrete time filter 100. The charge of the output capacitor (Cout) 120 is selectively maintained or discharged by means of an output capacitor reset switch 118 (β0).
The N-branch parallel discrete time filter 120 in FIG. 1, in a form of a Finite Impulse Response (FIR) filter, is not suitable as a radio frequency (RF) input stage for a receiver due to it's reactive input termination and large input noise bandwidth. Thus, DTFs, whilst able to naturally perform down-conversion (aliasing), fail to provide a well-defined, real, input termination at frequencies around the sampling frequency. In addition, they generally add a substantial amount of noise by folding noise around harmonics of the sampling frequency on top of the wanted signal (aliasing). Hence, for these reasons discrete time filters are currently not used as the first stage of communication receivers, i.e. as a low noise filter located prior to the (analog) LNA 116.
The analogue circuits (LNA, mixer) used as the first few stages of communication receivers limit the achievable linearity of the receiver. This is because of the non-linear characteristic of the devices used to implement them (generally, transistors) and because the high operating frequency limits the use of analogue linearization techniques such as feedback. In addition the power consumption of the input analogue circuits is usually a sizable fraction of the total power consumption of the receiver.
Thus, a need exists for an improved circuit design that could allow DTFs to be used in the RF circuits of receivers.